1. Field of the Invention
This invention relates to improvements in video preamplifier circuits or the like that are integrated onto a semiconductor substrate and which include halftone and fast blanking capabilities, and more particularly to improvements in circuitry for providing fast blanking and halftone control of an on-screen display of a color monitor.
2. Relevant Background
In color monitor systems typically used in personal computer applications, or the like, frequently it is desirable to have an on-screen display (OSD) capability. Such OSD capability makes possible the display of supplemental information that may be of interest concurrently with the normal picture being displayed. Such supplemental information may be, for example, the number and content of the buffers associated with an associated computer system, the status of the CPU registers, clock information, disk usage information, and so forth.
In the past, fast blanking capabilities have been provided in which the video information provided to the display screen is entirely blanked for certain portions of the display. This results in a window that is entirely black in which OSD information can be written and displayed.
In another prior embodiment, the video in the window is only partially blocked, for instance to 1/2 or 1/3 of the normal amplitude. This display condition is referred to as "halftone" (even though the video magnitude may not be exactly 1/2 of the full scale video value.) In this display condition, if OSD characters are to be displayed in the halftone window, a "fast blanking" capability is generally provided. The fast blanking capability produces a full video blanking of the portion of the video within the halftone window at which the OSD information is to be displayed.
Generally in the past, the OSD information has been digitally generated by a digital circuit under the control of the CPU, separately from the linear video preamplifier. The OSD information is then added to the video output lines between the video preamplifier and the video power driver stage that delivers the video drive signals to the video display. It can be seen that the fast blanking, halftone, and OSD information must be properly synchronized with the normal video display information in order that it correctly display. As the digital OSD circuitry is located externally from the video preamplifier circuit, extra connection pins must be provided between the fast blanking signal output and the video preamplifier, and between the halftone control signal and the video preamplifier in order to properly control the video output of the video preamplifier to enable the OSD characters to be inserted into the video picture displayed. The form of the halftone and fast blanking signals was only control pulses sent to the preamplifier. This presupposes that the preamplifier is designed to receive and process the halftone and fast blanking pulses to realize the OSD display.
Moreover, in the past, the control of the preamplifier video drive signals has been located in the output stage of the video preamplifier circuit. This resulted in a requirement for relatively large current handling capabilities, requiring larger control transistor devices, a large number of discrete components in control and blanking circuitry, and a larger number of connection pins from the preamplifier package.